if(SIMULATOR STREQUAL "verilator")
	include(verilator)
	mcv_gen_verilator_dut(
		"UT_coupledl2_cache" "L2Cache" "TestTop_fullSys"
		"${PROJECT_SOURCE_DIR}/mcv-ut/build/CoupledL2/CoupledL2FullSys.v")

	if(TRACE STREQUAL "ON")
		include_directories(${PROJECT_SOURCE_DIR}/dut/UT_coupledl2_cache_trace)
		add_library(
			UT_coupledl2_cache_trace
			${PROJECT_SOURCE_DIR}/dut/UT_coupledl2_cache_trace/UTL2Cache.cpp)
		add_executable(tb_coupledl2_cache_trace tb_coupledl2_cache.cpp)
		target_link_libraries(
			tb_coupledl2_cache_trace ovip xspcomm UT_coupledl2_cache_trace
			${PROJECT_SOURCE_DIR}/dut/UT_coupledl2_cache_trace/libDPIL2Cache.so)

	else()
		include_directories(${PROJECT_SOURCE_DIR}/dut/UT_coupledl2_cache)
		add_library(UT_coupledl2_cache
								${PROJECT_SOURCE_DIR}/dut/UT_coupledl2_cache/UTL2Cache.cpp)
		add_executable(tb_coupledl2_cache tb_coupledl2_cache.cpp)
		target_link_libraries(
			tb_coupledl2_cache ovip xspcomm UT_coupledl2_cache
			${PROJECT_SOURCE_DIR}/dut/UT_coupledl2_cache/libDPIL2Cache.so)

	endif()

endif()

if(SIMULATOR STREQUAL "vcs")

	set(XVCS_FLAGS "-full64 +v2k -timescale=1ns/1ns -sverilog +lint=TFIPC-L -debug_all +vcs+initreg+random +define+PRINTF_COND=1 +define+PRINTF_COND_=1 +define+ASSERT_VERBOSE_COND_=1 +define+STOP_COND_=1 +define+RANDOM=0 +define+SIM_TOP_MODULE_NAME=tb_top")

	include(vcs)
	mcv_gen_vcs_dut(
		"UT_coupledl2_cache" "L2Cache" "TestTop_fullSys"
		"${PROJECT_SOURCE_DIR}/mcv-ut/build/CoupledL2/CoupledL2FullSys.v" ${XVCS_FLAGS})

	if(TRACE STREQUAL "ON")
		include_directories(${PROJECT_SOURCE_DIR}/dut/UT_coupledl2_cache_trace)
		add_library(
			UT_coupledl2_cache_trace
			${PROJECT_SOURCE_DIR}/dut/UT_coupledl2_cache_trace/UTL2Cache.cpp)
		add_executable(tb_coupledl2_cache_trace tb_coupledl2_cache.cpp)
		target_link_libraries(
			tb_coupledl2_cache_trace ovip xspcomm vcs_tls vcs_save_restore_new
			UT_coupledl2_cache_trace
			${PROJECT_SOURCE_DIR}/dut/UT_coupledl2_cache_trace/libDPIL2Cache.so)

	else()
		include_directories(${PROJECT_SOURCE_DIR}/dut/UT_coupledl2_cache)
		add_library(UT_coupledl2_cache
								${PROJECT_SOURCE_DIR}/dut/UT_coupledl2_cache/UTL2Cache.cpp)
		add_executable(tb_coupledl2_cache tb_coupledl2_cache.cpp)
		target_link_libraries(
			tb_coupledl2_cache ovip xspcomm vcs_tls vcs_save_restore_new UT_coupledl2_cache
			${PROJECT_SOURCE_DIR}/dut/UT_coupledl2_cache/libDPIL2Cache.so)

	endif()

endif()
